Abstract
Thorough investigations of the low-frequency noise (LFN) in a fully depleted silicon-on-insulator technology node have been accomplished, pointing out on the contribution of the buried oxide (BOX) and the Si-BOX interface to the total drain current noise level. A new analytical multilayer gate stack flat-band voltage fluctuation-based model has been established, and 2D numerical simulations have been carried out to identify the main noise sources and related parameters on which the LFN depends. The increase of the noise at strong inversion could be explained by the access resistance contribution to the 1/f noise. Therefore, considering uncorrelated noise sources in the channel and in the source/drain regions, the total low-frequency noise can simply be obtained by adding to the channel noise the contribution of the excess noise originating from the access region (Δr). Moreover, only two fit parameters are used in this work: the trap volumetric density in the BOX, and the 1/f access noise level originating from the access series resistance, which is assumed to be the same for the front and the back interfaces.
Highlights
IntroductionDepleted (FD) Silicon-On-insulator (SOI) is considered as one of the candidates for the future sub 14 nm CMOS generations. e use of ultrathin body and thin buried oxide (UTBB) enables to enhance the technology scalability, providing a very good control of the short-channel effect (SCE), as well as back-to-front gate coupling effects useful for threshold voltage Vth control with efficient body bias effect [1, 2]
Depleted (FD) Silicon-On-insulator (SOI) is considered as one of the candidates for the future sub 14 nm CMOS generations. e use of ultrathin body and thin buried oxide (UTBB) enables to enhance the technology scalability, providing a very good control of the short-channel effect (SCE), as well as back-to-front gate coupling effects useful for threshold voltage Vth control with efficient body bias effect [1, 2].e study of low-frequency noise (LF) in the UTBB FDSOI is of great interest because it is a key issue for the technology evaluation for identifying the traps possibly introduced during the device processing
E study of low-frequency noise (LF) in the UTBB FDSOI is of great interest because it is a key issue for the technology evaluation for identifying the traps possibly introduced during the device processing
Summary
Depleted (FD) Silicon-On-insulator (SOI) is considered as one of the candidates for the future sub 14 nm CMOS generations. e use of ultrathin body and thin buried oxide (UTBB) enables to enhance the technology scalability, providing a very good control of the short-channel effect (SCE), as well as back-to-front gate coupling effects useful for threshold voltage Vth control with efficient body bias effect [1, 2]. E study of low-frequency noise (LF) in the UTBB FDSOI is of great interest because it is a key issue for the technology evaluation for identifying the traps possibly introduced during the device processing. It is limiting the analog circuit operation, but it should jeopardize the digital circuit functioning for aggressively scaled devices. Is new model, simple, is applied successfully to strongly coupled FDSOI devices, including correlated mobility fluctuations for the channel noise and the access noise originating from the Source and Drain regions (CNF + CMF+Δr), significantly going beyond previous works [3,4,5,6,7,8,9,10,11]. Note that the noise data below 10 Hz are not meaningful due to AC filtering in the noise measuring system
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