Abstract

A model has been developed to describe the shear stress distribution in the die attach layer of a power electronic component during thermal cycling or power cycling. This stress model is the first to account for the elastic, plastic and creep deformations present at elevated temperatures. Shear stress is the critical failure initiator since the normal stresses are negligible at the ends of the chip where failure is first observed. Hysteresis plots of the stress-strain relations are presented along with an estimate of the solder joint fatigue life by the energy partitioning method, which uses the area under the hysteresis plot as a measure of the damage accumulation in the solder. If the energy partitioning constants of the material are not available, then the Coffin Manson criteria can be used to assess the crack initiation. A linear elastic fracture mechanics model is used to predict crack propagation and thus predict life of the chip by die attach fatigue.

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