Abstract
Ultra-high-speed operation using a self-aligned stacked metal/in situ doped poly-Si (IDP) (referred to as SMI) Si bipolar transistor technology that offers low base resistance while keeping collector capacitance low is demonstrated. This SMI technology provides a base electrode consisting of metal and in situ boron-doped poly-Si (IBDP). Here, metal is fully stacked on the IBDP by using selective tungsten CVD in the self-aligned manner, which means that the structure has low sheet resistance and the fabrication process has a small thermal budget. Thus, low base resistance and low collector capacitance can be achieved. Three types of base electrode, an IBDP, a partially stacked SMI, and a fully stacked SMI, were fabricated to investigate the usefulness of this SMI technology and the importance of the low base resistance. Using the SMI technology, the base resistance was reduced to about 40% and the maximum oscillation frequency was raised by about 30% with respect to the conventional poly-Si base electrode. This technology makes it possible to obtain ultra-high-speed operation with a 12-ps gate-delay emitter-coupled logic (ECL) circuit, and with 45-GHz-dynamic and 28-GHz-static frequency dividers, even when using a conventional ion-implanted base.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.