Scaled-down reference switching scheme for low-power SAR ADCs

Abstract

An energy-efficient scaled-down reference (SDR) digital-to-analogue converter switching sequence is presented for a low-power successive approximation register analogue-to-digital converter. Owing to the fact that the proposed technique utilizes only a quarter of the capacitor array for input sampling, an SDR (Vref/4) and ground (Gnd) for the same input are required for conversion cycles, which achieve reduced switching energy and high linearity. The SDR switching structure improves the efficiency of average switching energy by 99.61% and reduces the total number of required capacitors in the digital-to-analogue converter arrays by 50% compared to the conventional structure.