Abstract
The positive bias temperature instability (PBTI) reliability of buried InGaAs channel n-MOSFETs with an InP barrier layer and Al2O3 gate dielectric under medium field (2.7 MV/cm) and high field (5.0 MV/cm) are investigated in this paper. The Al2O3/InP interface of the insertion of an InP barrier layer has fewer interface and border traps compared to that of the Al2O3/InGaAs interface. The subthreshold slope, transconductance, and shift of Vg are studied by using the direct-current Id-Vg measurements under the PBTI stress. The experimental results show that the degradation of positive ΔVg under the medium field stress is mainly caused by the acceptor trap, while the donor trap under the high field stress become dominant in the subthreshold region, which leads to the negative shift in Vg. The generation of acceptor trap are attributed by the InP barrier layer in the buried InGaAs channel n-MOSFETs, resulting that the part of recoverable donor trap has been neutralized under the high field stress. Compared to the surface InGaAs channel n-MOSFETs under PBTI stress, the low leakage current can be achieved in the buried InGaAs channel n-MOSFETs with an InP barrier layer.
Highlights
InGaAs was considered for use as the n-type high-mobility channel material because it has higher electron mobility and smaller electron effective mass than that of silicon [1,2,3]
Because oxide traps near the interface are mainly induced by the positive bias temperature instability (PBTI) stress [32], InP/InGaAs interface trap can be negligible
The lower interface trap can be realized by employing an InP barrier layer
Summary
InGaAs was considered for use as the n-type high-mobility channel material because it has higher electron mobility and smaller electron effective mass than that of silicon [1,2,3]. Al2O3/InGaAs interface traps and border traps in the dielectric layer remain high, which reduces the effective channel mobility and results in reliability instability in InGaAs MOSFETs [14,15,16]. Based on the poor interface quality of InGaAs and Al2O3, the introduction of a barrier layer between the Al2O3 dielectric and InGaAs channel considerably improves channel electron mobility, transconductance, Al2O3/InP/InGaAs MOSFET Under PBTI and drive current [17,18,19]. The InGaAs channel and Al2O3 dielectric are separated by the barrier layer, high interface traps and border traps considerably affect device reliability under bias temperature instability (BTI) stress [20,21,22]. To reduce interface defect density, the interface passivation techniques of N passivation treatment [23,24,25] and sulfur passivation treatment [26,27,28] have been investigated to improve the interface properties and reliability
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