Regaining Switching by Overcoming Single-Transistor Latch in Ge Junctionless MOSFETs

Abstract

This paper reports on the suppression of single-transistor latch, an extreme condition of impact ionization (I.I.), in n-type double-gate germanium (Ge) junctionless (JL) transistors. It is shown that JL transistors can be latched to the on-state due to an increase in the I.I. generated power per unit volume with an increase in drain bias, film thickness, oxide thickness, and doping. Latch, being detrimental to switching, can be effectively suppressed by applying an appropriate negative (positive) back-gate bias for n-type (p-type) JL MOSFET. The independent gate operation with appropriate back bias allows the device to overcome latching and regain switching action with a subthreshold swing ( ${S}$ -swing) <10 mV/decade at room temperature. The work showcases the limit imposed on back bias due to an increase in off-state current due to band-to-band tunneling along with the utility of sidewall spacer to effectively suppress the same. We also show the tunability of hysteresis using back-gate bias. The work highlights a systematic methodology to eliminate single-transistor latch while preserving sub-60 mV/decade switching in Ge JL MOSFETs.