Reconfigurable NoC development with fault mitigation

Abstract

An ability of faults mitigation becomes one of the main requirements for network-on-chip (NoC) embedded systems that are manufactured with thin design rules. Other requirements are for area, power consumption and QoS. Altogether these requirements lead to inconsistencies in NoC development process. In this paper we discuss approaches for resolving this conflict by the use of the dynamically reconfigurable NoC. We suggest a methodology for development of NoC with fault mitigation support The methodology allows to take into account specifics of design process and operating conditions in the implementation of a particular project. For verification of the suggested approach we use analysis and simulation. We suggest an approach to simulation that enables dynamic failure injection.