Abstract
The number of usable gates in field programmable gate array (FPGA) logic has recently reached a level which allows their use as computational structures in digital signal processing (DSP) applications. This paper reports on the development of a scalable computing architecture based on Xilinx (CMOS) XC4010 FPGAs for real-time digital signal processing. The architecture requirements for efficient implementation of common DSP algorithms on FPGA platforms are considered. An analysis of the implementation and performance of a high-bandwidth finite impulse response (FIR) filter is presented. A second design using data requantization and spectral shaping to achieve higher order filters is also described. >
Full Text
Topics from this Paper
Field Programmable Gate Array
Field Programmable Gate Array Platforms
Digital Signal Processing
Finite Impulse Response
Programmable Array Logic
+ Show 5 more
Create a personalized feed of these topics
Get StartedTalk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Similar Papers
Oct 1, 2012
Oct 6, 2020
International Journal of Circuits, Systems and Signal Processing
Jul 22, 2021
International Journal for Research in Applied Science and Engineering Technology
Jun 30, 2022
International Journal of Engineering & Technology
May 31, 2018
Journal of Communications
Jan 1, 2023
Apr 1, 2015
2015 Internet Technologies and Applications (ITA)
Nov 5, 2015
Apr 9, 2003
IEEE Access
Jan 1, 2022
COMPEL - The international journal for computation and mathematics in electrical and electronic engineering
Mar 9, 2010
Aug 4, 2021
International Journal of Advance Research and Innovation
Jan 1, 2019
Mar 25, 2021