Real time, nonintrusive instrumentation of reduced instruction set computer (RISC) microprocessors

Abstract

It is noted that real-time, nonintrusive instrumentation (RTNI) of high-performance RISC (reduced-instruction-set computer) microprocessors will be very difficult without some on-chip circuitry to support the event detection and data acquisition logic used to distinguish instruction execution flow and data generation and usage. The authors present a conceptual approach to providing unprecedented RTNI capabilities with a minimal amount of additional on-chip circuitry. In addition, through the use of the same pipelining and parallelism techniques used to implement the RISC microprocessor itself, the RTNI circuitry will impose little or no performance impact on the basic chip operating speed. The proposed approach does not perturb the system being monitored, so that the observations made are accurate and of high fidelity. In addition to providing highly selective, focused data acquisition, a large number of unique and/or generic events can be detected and acquired for a broad view of system operation. Combined with appropriate external support equipment and workstation software, this will result in a highly productive and capable integration and test environment. >