Abstract

ABSTRACT Readout circuit is designed for a special retina-like CMOS image sensor. To realize the pixels timing drive and readout of the sensor, the Altera's Cyclone II FPGA is used as a contro l chip. The voltage of the sensor is supported by a voltage chip initialized by SPI with AVR MCU system. The analog image signal outputted by the sensor is converted to digital image data by 12-bits A/D converter ADS807 and the digita l data is memorized in the SRAM. Using the Camera-link image grabber, the data stored in SRAM is transformed to image shown on PC. Experimental results show the circuit works well on retina-like CMOS timing drive and image read out and images can be displayed properly on the PC. Key words: retina-like CMOS sensor, FPGA , ADS807, SRAM, Camera-link 1 INTRODUCTION Because of the particular pixels distribution [1] , with rotation invariant features [2] , retina-like CMOS sensor has great advantages in high speed forward motion and panoramic imaging [3][4] . Our research group proposed a retina-like pixel structure layout scheme based on years of high speed forward motion image simulations. There is only simulation research in high speed forward motion imaging until our retina-like sensor, the first one in our country, is made. In this paper, a pixel read-out circuit program in which FPGA works as control unit for the retina-like sensor is put forward. This circuit is the foundation for the high speed forward motion imaging of the retina-like sensor latter. The real packaged sensor is shown in figure 1.

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