Abstract
A 3D `atomistic' simulation study of random dopant induced threshold voltage fluctuations and lowering in sub 50 nm MOSFETs is presented. The attention is focused mainly on devices with 30 nm effective channel length which represent the expected level of scaling at the end of the Silicon Roadmap. An efficient algorithm, based on a single 3D solution of the Poisson equation and a simplified current continuity equation, is used in the simulations. Large samples of microscopically different devices (typically 200) are used in order to obtain statistically reliable results. The influence of different aspects of the conventional MOSFET design on the threshold voltage fluctuations and lowering are investigated. Results for fluctuation resistant device architectures based on low-doped epitaxial channel MOSFETs are also presented.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
