Abstract

Rare earth oxides such as Gadolinia (Gd2O3) are extensively explored for buried oxide (BOX) application as a replacement for silicon dioxide (SiO2) in silicon-on-insulator (SOI) substrates. Of all the proposed methods, molecular-beam-epitaxy-based techniques have shown perfectly single-crystalline growth of Gd2O3. We present a radio frequency (RF) magnetron sputter based low-cost technique to grow single-crystalline Gd2O3 on Si (111) substrate. We show a gradual phase transition of the Gd2O3 layer from monoclinic to cubic by engineering the Gd2O3 deposition rate–i.e., tuning the RF power. We present a comparison amongst three samples as follows: (a) monoclinic; (b) monoclinic+cubic; (c) cubic at three different RF powers keeping the rest of the process conditions such as chamber pressure, Argon flow rate, etc., fixed. Further, we present a detailed structural characterization of all the three samples using a high-resolution X-ray diffraction system. Using the ω−2θ and pole-figure measurements we show a highly textured monoclinic Gd2O3 layer formation with (-402) crystal orientation in experiment (a). In experiment (c) we show phase transition of Gd2O3 from monoclinic to cubic by tuning the RF power. Finally, with experiment (b), we demonstrate that the aforementioned phase transition is a gradual phenomenon by highlighting a coexistence of both the monoclinic and cubic phases at an intermediate RF power. To ensure the electrical characteristics of the grown dielectric we present a metal oxide semiconductor capacitor structure fabrication for the monoclinic and the cubic Gd2O3 layers and benchmark the interface trap density, and dielectric constant against state-of-the-art literature. We show an improvement in the interface trap density, and reduction in the hysteresis from monoclinic to cubic phase transition due to an improved epitaxial relation between cubic Gd2O3 and Si(111) substrate. Such low-cost methods of growing single-crystalline Gd2O3 layer has the potential to replace the SiO2 BOX layer, and significantly bring down the manufacturing cost of the existing SOI wafer technology.

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