Abstract
Describes 2M rad(SiO/sub 2/) radiation hardened partially depleted SOI CMOS technology used to fabricate a 1M SRAM on full dose SIMOX (Separation by IMplantation of OXygen) wafers with an oxygen ion dose of 1.7/spl times/10/sup 18//cm/sup 2/ at 190 keV. They were annealed by Honeywell at 1325 /spl deg/C resulting in buried oxide thickness of approximately 370 nm and post CMOS processing silicon thickness of approximately 190 nm. Prior to processing, the SIMOX wafers are screened to achieve surface defect density of <0.2 per cm/sup 2/, HF defect density of <1 per cm/sup 2/, and background doping of <2/spl times/10/sup 16/ per cm/sup 3/.
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