Abstract
AbstractMemory hierarchy among conventional memory technologies is one of the main bottlenecks in modern computer systems; alternative memory technologies are thus necessary for quasi‐nonvolatile memory applications. Herein, a fully complementary metal‐oxide‐semiconductor‐compatible quasi‐nonvolatile memory composed of p+‐n‐p‐n+ silicon on a silicon‐on‐insulator substrate is presented. The quasi‐nonvolatile silicon memory device demonstrates high‐speed write capability (≤100 ns), long retention time (100 s), and nondestructive read capability (1000 s), with high sensing current margin (≈109) and reliable endurance (≥109) at low voltages (≤1 V). Disturb immunity for memory array operations is also observed. This study demonstrates that the proposed quasi‐nonvolatile silicon memory device is a promising candidate that can revolutionize the entire memory hierarchy.
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