Abstract

The use of multiple current terminals on millimeter-scale graphene p-n junction devices fabricated with Corbino geometries, or quantum Hall resistance dartboards, has enabled the measurement of several fractional multiples of the quantized Hall resistance at the ν = 2 plateau (RH ≈ 12 906 Ω). Experimentally obtained values agreed with the corresponding numerical simulations performed with the LTspice circuit simulator. More complicated designs of the quantum Hall resistance dartboard were simulated to establish the potential parameter space within which these Corbino-type devices could output resistance. Most importantly, these measurements support simpler processes of ultraviolet lithography as a more efficient means of scaling up graphene-based device sizes while maintaining sufficiently narrow junctions.

Highlights

  • PnJ devices and possibly other device geometries

  • These experiments serve to support and validate three main points: the scalability of p-n junctions (pnJs) devices, the versatility of pnJ circuits using multiple current terminals, and the flexibility provided by large-scale junctions in transforming devices with Corbino geometries into those that allow edge-state current flow between the two edges or quantum

  • The simulations for the Corbino pnJ devices were performed with the electronic circuit simulator LTspice, with quantum Hall elements that were used as described in relevant works

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Summary

Introduction

As shown in recent studies,35,36 one approach involves the use of multiple current terminals, which largely allows the quantized resistance parameter space achievable with traditional (linear) Hall pnJ devices and possibly other device geometries. The key advantage in using the Corbino geometry over the traditional Hall bar is that many more quantized values can potentially be obtained due to the periodic boundary conditions imposed on the electron flow.

Results
Conclusion
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