Abstract

The dramatic increase in switching speeds and circuit density in very large-scale integrated (VLSI) chips combined with denser packaging necessitates careful consideration of all the electrical characteristics of multichip modules (MCM). The development of high performance large-scale computers places many challenging requirements on packaging development engineers. High speed circuits demand low inductive interconnections, low cross talk, controlled characteristic impedance, power integrity, proper line resistance, high power dissipation, and minimum time of flight. Multichip modules provide short interconnection paths and eliminate one complete level (i.e., the card level) of packaging. Interconnect schemes and circuits must be designed such that the system can operate within electrical constraints such as capacitance loading intra, and interlayer crosstalk. The demand for a large number of input/output (I/O) pads on VLSI chips and the vast number of wiring channels needed to interconnect them in a multichip module leads to Various compromises in the electrical design of the wiring planes, such as types of ground planes and the number of signal planes between references. In this paper basic electrical parameters such as self and mutual capacitanceS, characteristic impedance, propagation delay, intra- and interlayer crosstalk are evaluated for five types of module designs. A family of tables consisting of capacitance and inductive matrices, which completely characterize the transmission lines and the matched term!nation coupled noise is presented for muitilayer ceramic (MLC) modules.

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