Abstract
We describe a codesign approach based on a parallel and scalable ASIP architecture, which is suitable for the implementation of reactive systems. The specification language of our approach is extended statecharts. Our ASIP architecture is scalable with respect to the number of processing elements as well as parameters such as bus widths and register file sizes. Instruction sets are generated from a library of components covering a spectrum of space/time trade-off alternatives. Our approach features a heuristic static timing analysis step for statecharts. An industrial example requiring the real-time control of several stepper motors illustrates the benefits of our approach.
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