Prominent Speed Low Power Compressor Based Multiplier for Proficient VLSI Architecture

Abstract

In the recent years the computational units are optimized to reduce the computation time. Multiplier is an electronic circuit used in digital electronics and has a significant role in vlsi applications. The 4:2 compressors have a flexibility of switching between exact and appropriate operating modes. In the appropriate mode the dual quality compressors provides higher speeds and consumes low power. Using these compressors in the structures of parallel multipliers provides configurable multipliers whose accuracies (as well as their powers and speeds) may change dynamically during the runtime. The efficiencies of these compressors are used in another type of multiplier and are evaluated in 45 nm standard CMOS technology. By comparing the parameters of this multiplier with those of appropriate multipliers, the results indicate a better in almost all the aspects.