Abstract
This study reports and experimentally demonstrates a programmable on-chip photonic processor towards different RF receiver configurations. The Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> processor is built by interconnecting independent subunits such as simple and complex Mach-Zehnder interferometers and Ring resonators. The design, fabrication, and characterization of a dedicated chip are described. As a proof of concept, it can be used as a reconfigurable filter with distinct frequency response. More importantly, a thorough RF receiver related passive processor including out-of-band suppression, carrier-sideband routing, channelization filtering, as well as I-Q mixing prior to an optical detection stage. This is effective proof of a programmable integrated processor encompassing most passive filtering and routing subunits for broadband photonic RF receiver.
Highlights
Being an important branch of the RF industry, Radio Frequency Integrated Circuits (RFICs) for filters are making continuous progress in optimizing the performance as well as subdividing the functionalities
We indicate whether a given subpart is in active mode, or in routing mode or inactive
Two different bend radii are employed in mask layout: the lower one that down to 100 μm is employed for components interconnection inside the subparts, which would reduce the footprint of the whole chip; the higher one with the value of 200 μm is used for parallel or bent heaters to prevent thermal crosstalk in dense areas such as the cascaded RRs and Hybrid Coupler (HC) as shown in the insets of Fig. 3a
Summary
Being an important branch of the RF industry, Radio Frequency Integrated Circuits (RFICs) for filters are making continuous progress in optimizing the performance as well as subdividing the functionalities. The evolutions of RF filter circuits have become a weather vane that might determine the system performance. Filter circuits face a crucial challenge at the current trend of high throughput market expansion – their sizeable dimensions are not compatible [1], [2]. Less selectivity and tunability at high frequencies as well as massive uncertainty during design and fabrication prevent further miniaturization of the filters for cost-effective, high-speed applications. The bulky nature of passive RF components prevents further miniaturization of the RF chips for. Off-chip components could partially solve this limitation, but at the cost of a reduced level of integration and an additional parasitic caused by packaging
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