Proceedings of the 2015 Symposium on International Symposium on Physical Design

Abstract

On behalf of the organizing committee, we are delighted to welcome you to the 2015 ACM International Symposium on Physical Design (ISPD), held at Monterey, California. Continuing the great tradition established by its twenty-three predecessors, which includes a series of five ACM/SIGDA Physical Design Workshops held intermittently in 1987-1996 and eighteen editions of ISPD in the current form since 1997, the 2015 ISPD provides a premier forum to present leadingedge research results, exchange ideas, and promote research on critical areas related to the physical design of VLSI and other related systems. We received 44 abstract submissions and 37 full submissions from all around the world. After a rigorous, month-long, double-blind review process, the Technical Program Committee (TPC) met face-to-face to select papers to be included in the technical program based on 185 reviews provided by 18 TPC members and 39 external reviewers. Finally, the committee accepted 14 papers to be presented in the symposium. These papers exhibit latest advancements in a variety of topics in placement, routing, 3D integration, clocking, power network planning, design for manufacturability, and physical design with latest machine learning approaches. The ISPD 2015 program is complemented by two keynote addresses, seven invited talks and an invited session on FreePDK library, all of which are delivered by distinguished researchers in both industry and academia. Dr. Karim Arabi, Vice President, Engineering at Qualcomm will present in the Monday keynote speech, challenges and opportunities in scalable integration of 3D VLSI. Dr. Rob Rutenbar, Abel Bliss Professor and Head of the Department of Computer Science in the University of Illinois at Urbana-Champaign will present in the Tuesday keynote speech on analog circuit and layout synthesis. A commemorative session on Tuesday afternoon pays a tribute to Dr. Kurt Antreich. His collaborators will share with us Dr. Antreich's exceptional contributions to EDA research, including his pioneering effort in analytical circuit placement, which still has significant impact on various placement methods today. The other invited talks will be interspersed with the presentations of accepted papers. The topics of the invited papers range from emerging technologies like directed self-assembly circuits, monolithic 3D ICs, to modern challenges in analog IC layout and applications of machine learning in physical design. Since 2005, ISPD has organized highly competitive contests to promote and advance research in placement, global routing, clock network synthesis, and discrete gate sizing. This year's contest is on detailed routing-driven placement and is organized by Mentor Graphics. Specifically, this is the second year of this topic and the problem is made even more challenging by imposing constraints of fence regions and placement blockages, besides the detailed pin, cell and wire geometry constraints in 2014. The contest evaluates the quality of a placement with a commercial detailed router in order to motivate research to address significant complexity of routing-design rules in sub-20nm nodes. Continuing the tradition of all the past contests, a new large-scale real-world benchmark suite will be released in industry-standard formats including LEF, DEF, and Verilog description in the ISPD website: http://www.ispd.cc