Predicting performability of a fault-tolerant microcomputer for process control

Abstract

The performability of a gracefully degrading process-control microcomputer is evaluated. Two Markov models, fault/error handling and fault occurrence and repair, are used to describe the microcomputer. They are solved separately using the behavioral decomposition/aggregation method. A numerical algorithm, based on Laplace and Laplace-Stieltjes transforms, it used to derive system performability. The influence of the permanent, intermittent, and transient faults underline the importance of the detection, isolation, and reconfiguration mechanisms. The effect of the parallelization algorithms is analyzed. The performability increases appreciably when global repair actions are undertaken. Local repair also has a beneficial influence, but only for large amount of required work. Adding spare processing elements improves performability. Their influence becomes visible for large amounts of work. >