Abstract
The electrical performance (such as electrical resistance, inductance, and fusing current capability) is a key factor for a power electronic product. Many studies, such as the electrical performance of different devices, effect of assembly reflow process on electrical properties and the resistance of a solder joint, have been done to improve a product’s electrical performance (Modeling for defects impact on electrical performance of power packages, 2010; A comparison of electrical performance between a wire bonded and a flip chip CSP package, 2003; Intermetallics 14:1375–1378, 2006; Microelectron Eng 63:363–372, 2002). In recent years, the investigation has been started for the electrical conductivity under the mechanical deformation of a device (Microelectron Reliab 46:589–599, 2006). Package design optimization for electrical performance of a power module by using finite element analysis (FEA) (Package design optimization for electrical performance of a power module using finite element analysis, 2008) has also been presented. Studying the impact of the defect on package electrical performance, especially for the parasitic effect, is very important. It can help to understand the potential root causes and failure mechanisms, as well as to ensure that the electrical performance meets the requirement of product by optimizing the package design and assembly process.
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