Abstract

This work was supported by a Grant TEC2016-80396-C2 (AEI/FEDER). The work of Hector Daniel Rico-Aniles was supported by the Mexican Consejo Nacional de Ciencia y Tecnologia (CONACYT) through an academic scholarship under Grant 408946.

Highlights

  • Sample-and-hold circuits are one of the most important building blocks in mixed signal IC design

  • In this paper, following definitions are used: a ‘‘true-sample-and-hold’’ (TSH) denotes a circuit that maintains the sampled output constant during the entire clock cycle; a ‘‘reset-and-hold’’ (RH) denotes a circuit that holds the output during one phase and resets it to a constant value during a non-overlapping phase and a ‘‘track-and-hold’’ (TH) denotes a circuit where the output tracks the input during one phase and holds its last value during the non-overlapping phase

  • The auxiliary output stage works with 1 μA, this yields to a power consumption of the proposed TSH of 293 μW, which represents an increase of only 1.3% when compared to the conventional RH

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Summary

INTRODUCTION

Sample-and-hold circuits are one of the most important building blocks in mixed signal IC design. The circuit has the drawback that it holds the output value during φno and resets to the offset voltage (Vos) during φ, as shown in the simulation of Fig. 2 In this scheme the opamp is required to have a high slew rate so that it can provide periodically large output variations within a brief period of time (τ

CIRCUIT DESCRIPTION
Findings
CONCLUSION
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