Abstract
Silicon nanowires (SiNWs) are a widely used technology for sensing applications. Complementary metal-oxide-semiconductor (CMOS) integration of SiNWs advances lab-on-chip (LOC) technology and offers opportunities for read-out circuit integration, selective and multiplexed detection. In this work, we propose novel scalable pixel-based biosensors exploiting the integration of SiNWs with CMOS in fully-depleted silicon-on-insulator technology. A detailed description of the wafer-scale fabrication of SiNW pixels using the CMOS compatible sidewall-transfer-lithography as an alternative to widely investigated time inefficient e-beam lithography is presented. Each 60 nm wide SiNWs sensor is monolithically connected to a control transistor and novel on-chip fluid-gate forming an individual pixel that can be operated in two modes: biasing transistor frontgate (VG) or substrate backgate (VBG). We also present the first electrical results of single N and P-type SiNW pixels. In frontgate mode, N and P-type SiNW pixels exhibit subthreshold slope (SS) ≈ 70–80 mV/dec and Ion/Ioff ≈ 105. The N-type and P-type pixels have an average threshold voltage, Vth of −1.7 V and 0.85 V respectively. In the backgate mode, N and P-type SiNW pixels exhibit SS ≈ 100–150 mV/dec and Ion/Ioff ≈ 106. The N and P-type pixels have an average Vth of 5 V and −2.5 V respectively. Further, the influence of the backgate and frontgate voltage on the switching characteristics of the SiNW pixels is also studied. In the frontgate mode, the Vth of the SiNW pixels can be tuned at 0.2 V for 1 V change in VBG for N-type or at −0.2 V for −1 V change in VBG for P-type pixels. In the backgate mode, it is found that for stable operation of the pixels, the VG of the N and P-type transistors must be in the range 0.5–2.5 V and 0 V to −2.5 V respectively.
Published Version
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