Abstract
This work investigates the behavior of fully depleted silicon-on-insulator (FD-SOI) Hall sensors with an emphasis on their physical parameters, namely the aspect ratio, doping concentration, and thicknesses. Via 3D-technology computer aided design (TCAD) simulations with a galvanomagnetic transport model, the performances of the Hall voltage, sensitivity, efficiency, offset voltage, and temperature characteristics are evaluated. The optimal structure of the sensor in the simulation has a sensitivity of 86.5 mV/T and an efficiency of 218.9 V/WT at the bias voltage of 5 V. In addition, the effects of bias, such as the gate voltage and substrate voltage, on performance are also simulated and analyzed. Optimal structure and bias design rules are proposed, as are some adjustable trade-offs that can be chosen by designers to meet their own Hall sensor requirements.
Highlights
Hall sensors are currently the most widely used magnetic sensors [1]
To achieve good performance, it is useful to have a simple set of rules for the customization of sensor designs that are compatible with silicon complementary metal-oxide-semiconductor (CMOS) processes
The design rules are defined based on the simulation results
Summary
Compared with other magnetic sensors, Hall sensors are characterized by non-contact, strong anti-interference, and high linearity [2], and they are used in current detection, angle measurement, and geomagnetic field detection. Since the 1940s, with the vigorous development of semiconductor technology, III-V semiconductor materials with low carrier concentrations and high mobility have become the mainstream materials for the fabrication of Hall cells, compared to silicon-based the Hall cells [3]. With the fast growth and maturity of integrated circuit technology, Hall integrated circuits with Hall cells and signal processing circuits have emerged, and the properties of III-V semiconductor materials are significantly less attractive for the integration of Hall sensors than are the properties of silicon materials [4]. Compared to the conventional bulk CMOS-based Hall sensors, fully depleted silicon-on-insulator (FD-SOI) technology offers several substantial advantages
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.