Performance investigation of nanoscale reversible logic gates designed with SE-TLG Approach

Abstract

ABSTRACT The progressive shrinking of MOS dimensions confronts critical issues while designing low power consuming computational devices. The Single Electron Technology is one of the emerging technological solutions to cope up with the scaling challenges and support Moore’s law. Apart from the miniaturization, another concern is the energy efficiency of the designed circuit. Use of reversible logic in place of the conventional Boolean logic can serve the purpose. The works so far in this field mainly concentrated upon the application aspect of different reversible gates and reversible circuits rather than proper technological approach or device based design .Different reversible gates such as Fredkin, Toffoli and Double Feynman Gate implementation with Single Electron device and their simulation results are presented in this paper. The power consumption, stability and the size are mainly considered as the different performance metrics. The circuit stability and its temperature dependency is also analysed through the Stability plots generated in SIMON simulator. A new reversible gate PE1 for even parity generating circuits is also proposed along with the supporting simulation results .The design issues and power consumption are compared with the SET-CMOS hybrid-based designs of the same circuits.