Performance Improvement of ALU using D3L Logic

Abstract

Today's electronic circuits utilizes large amount of data and so a large number of processing elements. Usually, the overall system performance depends on the interconnection scheme and the individual processing element. The performance of individual processing elements depends on the logic by which it is implemented. There are different logic styles like static NMOS, CMOS, dynamic logic etc. introduced to implement digital circuits. Dynamic logic is distinguished from so-called static logic in that dynamic logic uses a clock signal in its implementation of combinational logic circuits and hence there is clock power dissipation. It was in 2000 R.Rufati, S.M Fukhraie and K.C Smith introduced D3L logic. They proved that D3L logic reduces clock power dissipation in dynamic circuits. Later they implemented a barrel shifter using D3L logic. The question is whether D3L logic can be used in place of static logic to improve the performance.