Performance evaluation of multiple-valued logic circuits using statistical approach

Abstract

Since there are no standard benchmark functions available for comparing multiple-valued logic (MVL) designs, benchmark functions for binary logic design are often used for performance analysis of MVL circuits. An alternative would be to test all the possible multiple-valued logic functions for different input variables. Considering the fact that for r-valued logic, there are rr2 possible 2-input functions, testing of all functions is too much time consuming. Therefore, a choice has to be made between random functions and benchmark functions. This paper presents a statistical approach for fast comparison of MVL designs. The result shows that 150 random functions are sufficient to obtain an average circuit size of 2-input, 4-valued logic functions