Performance Enhancement of Silicon Nanowire Memory by Tunnel Oxynitride, Stacked Charge Trap Layer, and Mechanical Strain

Abstract

Heavily doped silicon nanowires (SiNWs) are adopted to fabricate a memory device composed of an AlON tunnel layer and a HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /HfAlO charge trap bilayer, which exhibits a large memory window of 4.6 V when operated in the program/erase phases, i.e., +12 V for 100 μs and -12 V for 10 ms, along with excellent 70% extrapolated ten-year data retention and good endurance up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> cycles. Strain effects on SiNW memory characteristics have also been investigated. It is demonstrated that the tensile strain increases the program window and the compressive strain improves the data retention. The underlying mechanism is attributed to the incorporation of nitrogen in the AlON tunnel layer.