Abstract
In this paper, effect of surface on breakdown voltage characteristics using 2-D Synopsys Sentaurus TCAD simulation were studied by comparing different surface structures of 4H-SiC MESFETs such as Non-recessed, channel-recessed, Non-recessed buried-gate and channel-recessed buried-gate structures. On current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ) and off current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">oFF</sub> ) characteristics of all structures are studied. Buried gate structure with channel recess showed highest breakdown voltage compared to all other structures but with low on current (I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ). In addition, the effect of depth of buried region and length of gate on breakdown voltage characteristics is studied.
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