Pattern transfer optimization for the fabrication of arrays of silicon nanowires

Abstract

The main challenges toward massive fabrication of silicon nanowires are the way to control the crystal orientation and size. In the present work, we report advances in the pattern transfer process to obtain arrays of holes on a Si substrate, aiming at the fabrication of ordered arrays of quantum wires. The wires obtained from this procedure can be uniform in terms of doping profile, crystal orientation and size, while enormously simplifying metallic contacting for applications where parallel biasing is needed. The samples have been fabricated using a combination of electron-beam lithography and reactive-ion etching. Electron-beam lithography is performed at 10 keV on a 100 nm thick 950 K PMMA. A specific recipe for deep reactive-ion etching was developed in order to minimize any widening or under-etching of the holes, as well as any type of wall roughness. Holes with diameters from 30 nm up to 900 nm, and pitch from 90 nm up to 1000 nm were fabricated, achieving no observable scalloping. The sample has been oxidized for further reduction of the size of interconnects (the site between two holes) and interstitials (the site between three holes). As a result, thin nanowires have been fabricated.