Abstract

The effect of both wet-chemical smoothing and deposition of intrinsic a-Si:H buffer layer on electronic surface and interface properties was investigated for monocrystalline p-type silicon substrates with pyramidal light trapping structures. For the complete removal of native and wet-chemical oxides during the final etching in HF (1%), the treatment time was optimized for each etching step, which leads to a significantly reduced density of rechargeable states on the substrate surface. This density of substrate surface states could be preserved during subsequent deposition of intrinsic and doped a-Si:H buffer layers on the front and back sides by plasma enhanced chemical vapour deposition (PECVD). Solar cells prepared with optimized wet-chemical wafer treatment improved significantly in fill factor. The application of intrinsic buffer layers results in an additional improvement of the open circuit voltage by ∼50 mV, leading to efficiencies enhanced by ∼3% (absolute value) for ZnO/(n,i) a-Si:H/(p) c-Si/(i,p+) a-Si:H/Al cells, as compared to cells with non-optimized substrate treatment and without (i) a-Si:H buffer layers.

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