Parallel and Reconfigurable Mesh Architecture for Low and Medium Level Image Processing Applications

Abstract

Image processing and especially real time image processing is a very compute intensive task. Nowadays, with the high volume of data to be processed and the increasing size of images, the development of image processing architectures is very required, but most cases of architectures are mostly limited to one single task. This work introduces a parallel Reconfigurable Mesh architecture called RMC (Reconfigurable Mesh Computer) suitable for image processing applications. This architecture provides the flexibility of a programmable architecture and performance of a dedicated circuit, geared to the efficient parallel execution of low and medium level image processing operations. These processing operations derive abstractions from the image pixels so that it can help in further decision making about image. Before describing the proposed architecture, this paper reviews the criteria to be taken into consideration to compare image processing architecture, reinforced by an illustration of some hardware image processing architectures. We also identify some performed applications on RMC, to finally conclude with our future research directions for RMC architecture.