Package Technology Selection of 28nm High Power FPGA with Pb-Free Solder Bumps: Flip Chip Molded BGA (FCMBGA) versus Traditional Flip Chip Bare Die Package

Abstract

Selecting the optimal flip-chip package technology for the next generation 28nm FPGA is critical not only to meet reliability benchmarks for Pb-free bumps, but also in meeting the field-use environment requirements for high power devices. Component level reliability testing was conducted on three separate package types: Bare die flip chip BGA (FCBGA), flip chip molded BGA with capillary underfill (FCMBGA w/CUF), and flip chip molded BGA with molded underfill. (FCMBGA). Testing was conducted independently at two separate sites. Testing included moisture resistance testing (MRT), temperature cycle (JESD22-A104 Condition Level B), and a hybrid test combining 100 hours of unbiased HAST (JESD22-A118A) with temperature cycling. Reliability monitoring was conducted through multiple means including electrical testing for circuit continuity, CSAM imaging at frequent read points to monitor silicon integrity and underfill adhesion performance, cross-sections for the inspection of bump crack propagation, and FIB analysis of the UBM structure after test completion. In addition to reliability testing of three flip chip BGA platforms, other usage factors were considered. These include package specific design rule flexibility for passive placement and future generation packaging requirements. The results of the evaluation demonstrated that bump integrity remained strong for all three package types – showing no cracks after 1,500 temperature cycles, hybrid testing, or MRT. Ultimately, the FCMBGA with molded underfill was selected based on the quality of the bumps after testing, the design rule flexibility for capacitor placement, and improved component protection from mechanical damage.