P-51: Mjollnir: A 300-Output Cascadeable High-Voltage Display Driver

Abstract

A new high-voltage driver, originally designed for an 800x600 passive matrix AFLC display application, is integrated in a 0.35µm CMOS technology. The IC features 65V driving capability on all 300 outputs and is able of generating all kinds of complex high-voltage waveforms that are constituted out of 8 voltage levels (7 high-voltage levels and ground). 1. Introduction antiferroelectric liquid crystal (AFLC) displays are promising alternatives to existing products in the high-end segment of flat panel displays [1]. The increased interest in this LC material originates from associated characteristics as an excellent dynamic response, a wide viewing angle and an intrinsic analogue grey-level possibility. On top of these decisive advantages, tristate AFLCs can be driven with either active or passive matrices due to the fact that grey levels are maintained over the whole display with a constant DC voltage (=optical multi-stable). Other LCs like regular nematic LCs can only be employed in active matrix displays as the material does not show any electro-optical effect that can be used to hold its information along the frame time. The optical multi-stability character of AFLC is fully exploited in case of passive multiplexed addressing. A typical addressing waveform, which is directly derived from the specific symmetrical shape of the AFLC’s hysteresis graph (Figure 1), involves positive and negative cycles. The positive cycle consists of: grey level selection, stabilization by bias pulse, forced relaxation by counter pulse and reset time. A reset time is incorporated in the waveform in order to avoid memory effect between consecutive frames. However, this relaxation of the AFLC material in absence of applied voltage is a slow process. This problem is circumvented by introducing a forced relaxation with a counter-pulse prior to the reset time. The negative cycle compromises identical waveform stadia as the positive cycle (grey level selection, stabilization, forced relaxation and reset). However, the negative cycle is deduced from opposite hysteresis lobes in comparison with the positive cycle. Negative cycles alternate with the positive cycles in order to keep the DC component over the AFLC to a minimum. The AFLC addressing waveform from Figure 1 can be realized as a low-voltage data signal superimposed onto a principal highvoltage wave. The voltage range of the grey-level data is relatively small and falls within the scope of commercially available data drivers. The principal high-voltage waveform, on the other hand, is far from standard: a dedicated sequence of highvoltages up to 60Volt. With this kind of applications in mind, the idea of a high-voltage display driver was born. The design and development of such a high-voltage display driver finally resulted in the 300 output integrated circuit ‘Mjollnir’, named after the Thor’s hammer, which has a full 65Volt driving capability, a bidirectional shift-register and which is easily cascadeable. On top of that, no AFLC-specific voltage-levels or waveforms are predefined. Hence, ‘Mjollnir’ becomes also applicable for most bistable LC displays.