Overcoming fuzzy design practice: revealing potentials of user-centered design research and methodological concepts related to user involvement

Memristors are novel devices, useful as memory at all hierarchies. These devices can also behave as logic circuits. In this paper, the IMPLY logic gate, a memristor-based logic circuit, is described. In this memristive logic family, each memristor is used as an input, output, computational logic element, and latch in different stages of the computing process. The logical state is determined by the resistance of the memristor. This logic family can be integrated within a memristor-based crossbar, commonly used for memory. In this paper, a methodology for designing this logic family is proposed. The design methodology is based on a general design flow, suitable for all deterministic memristive logic families, and includes some additional design constraints to support the IMPLY logic family. An IMPLY 8-bit full adder based on this design methodology is presented as a case study.

PurposeThis paper seeks to highlight the role of entrepreneurship education in encouraging the growth of graduate entrepreneurship in the UK to help overcome the over‐supply of university graduates in a very difficult employment market. This paper aims to discuss the design principle for entrepreneurship education that facilitates graduate entrepreneurship, and the design methodology that allows multi‐faculty collaboration in the provision of entrepreneurship programmes.Design/methodology/approachThis paper begins with the conceptualisation of design principles and frameworks based on current concepts found in the literature, followed by practitioner‐based reflection to shed insights into the process of developing entrepreneurship education in higher education institutions (HEIs).FindingsThe authors have developed the “30/70 methodology” to guide the future design of entrepreneurship education, and the “80/20 methodology” to support cross‐faculty entrepreneurship programmes to serve non‐business students. Factors that impede or support academic entrepreneurship and effective integration of entrepreneurship programmes in HEIs are discussed.Originality/valueThis paper shares the authors' experiences, and their unique design principles and methodology to support the development of education for entrepreneurship.

PurposeThe generic design environment for a flexible printed‐circuit board assemblies (PCBA) remanufacturing cell contains four interrelated complex design domains. Mechanical design domains are really complex and the use of well‐proven mechanical product design methodologies does not help the designer. Hence, this paper aims to develop a generic systematic design methodology for a flexible PCBA remanufacturing cell.Design/methodology/approachThe study investigates the use of conventional mechanical product design techniques for the design of a flexible PCBA rework (remanufacturing) cell. It indicates problems and the weaknesses when conventional product design techniques are used for the development of flexible manufacturing systems (FMS). It then provides a new systematic mechanical design methodology for designing a flexible PCBA rework (remanufacturing) cell. The design methodology is intended to be generic in order to apply successfully to any FMS design.FindingsConventional product design methodology cannot be used directly for the design of a flexible PCBA remanufacturing cell. Hence, two design methodologies were developed: the generic FMS mechanical design methodology and a specific FMS design methodology for a PCBA rework cell. The first one was developed based on the tasks of the conventional product design process integrated with new design tools. The generic design methodology was then extended to obtain the second methodology for a PCBA rework cell design. Both of the methodologies were applied to a flexible PCBA rework cell design problem. Both design methodologies eliminated unusable design solutions at the early design stages of the conceptual design process and made the design process easier.Practical implicationsThe generic and specific design methodologies provide a better design environment, even for less specialized FMS designers.Originality/valueThe design methodologies may help for the commercialization of a flexible PCBA remanufacturing cell that may be used for SM rework and assembly.

A View on Design: The German Perspective

As manufacturers employ emerging advances in lithographic technologies, the need for complementary improvements in design processes becomes critical. In moving to nanometer technology nodes at 90nm and below, semiconductor companies will face increased challenges for optimizing yield beyond traditional post-processing methods. Instead, increasing responsibility for yield improvement will focus on lithography-friendly design methodologies and adoption of improved design-for-manufacturability (DFM) practices able to address manufacturing yield issues from first silicon, into production ramp-up and during volume manufacturing. Among emerging DFM practices, "yield-focused" design tools and methodologies address yield-loss mechanisms arising with nanometer technologies. By employing these emerging tools and methodologies, engineers can address manufacturing-induced yield problems early in the design process and through manufacturing.

The article presents the application of a Human-Computer Interaction (HCI) test with teenagers between 15–18 years old in Nezahualcóyotl, Mexico. We aim to identify what steps the teenagers follow to choose information sources coming from digital sources. The main topic is the use and appropriation of communication tools for the resolution of family conflicts with gender perspective in the frame of Comprehensive Sexual Education (CSE) with the aim of creating the frame of reference for the design of a mediation tool based in the principles of Human-Centered Design (HCD). In this document, we describe the stages that constitute the design methodology of Human-Centered Design that allowed us to identify the behavior and interaction that takes place between the teenagers and the digital environment that has the most presence and relevance between them for informing themselves about sexuality. The results obtained of the implementation are as follows: the delimitation of the digital environment with more relevance for teenagers between 15–18 years when they research about sexuality on the internet, the identification of the topic about sexuality that those teenagers search the most and, finally, the understanding of the interaction that takes place between the teenagers and the digital environment so we can design a mediation tool based in the principles of Human-Centered Design.KeywordsComprehensive sexual educationSocial constructivismHuman-computer interactionHuman-centered designDigital platformYoutube

In order to help companies to improve their competetiveness, it is important to develop new design methodologies. In this framework, a Functional And Robust Design (FARD) methodology dedicated to routine design of “highly productive” modular product ranges is proposed including principles of functional analysis, Design For Assembly (DFA), and techniques of modelling and simulation for ergonomics consideration. This paper focuses on the application of this original method applied to mechanical vibration and ergonomics problems of a scraper. Including biomechanical aspect in the design methodology, it is possible to identify the impact of a vibration tool on its users using numerical models of the tool coupled to a finite element model of the human hand. This method can proactively warn very early, in the design process, the risks of causing musculoskeletal disorders and facilitate an optimization of the mechanical tool. This study is a first step in a context of human-centered design.

Nanoparticles (NPs) have become essential elements in a number of scientific and industrial domains, such as materials research, drug delivery, and diagnostics, because of their special qualities and potential for focused uses. An ideal formulation procedure is essential to maximising the effectiveness and efficiency of nanoparticles. In order to optimise the formulation and production processes for nanoparticles, this research investigates the application of Quality by Design (QbD) principles in conjunction with sophisticated statistical approaches, namely the 3-level factorial design and the Box-Behnken methodology. The Quality by Design methodology is a methodical approach that prioritises predetermined goals, in-depth process comprehension, and careful control grounded in reliable science and quality risk management. When QbD is incorporated into nanoparticle optimisation, reliable and repeatable formulations that adhere to specifications with little variation are guaranteed. To look into how different factors interact and affect the properties of nanoparticles, the 3-level factorial design is used. With this design approach, a thorough understanding of the process variables can be obtained by exploring a broad variety of component values. Critical quality attributes (CQAs) include important parameters such drug encapsulation efficiency, zeta potential, polydispersity index (PDI), and particle size. These parameters are methodically examined to determine the ideal amounts of each. To further refine the 3-level factorial design, the Box-Behnken methodology is applied. Without the requirement for extensive combination testing, this response surface methodology (RSM) is especially useful for building second-order polynomial models and investigating quadratic response surfaces. By enabling a more accurate comprehension of the interactions between inputs and responses, the Box-Behnken design improves the optimisation process and makes it easier to identify the ideal circumstances for nanoparticle synthesis. By utilising both approaches in tandem, this work methodically determines ideal formulation parameters that minimise nanoparticle size and polydispersity while optimising stability and drug loading efficiency. The outcomes highlight how important a QbD framework is for directing the creation of reliable nanoparticle systems that function consistently and predictably.

One of the biggest challenges that are facing the Very Large Scale Integrated Circuits (VLSI) technologies today is the significant performance gap (3× to 9×) between full custom circuits and Application Specific Integrated Circuits (ASICs) designed in the same process generation. This situation is mainly exacurbated by the lack of suitable design tools and methodologies that can properly take into account the real implications and limitations of very deep submicron (VDSM) and nanometer scale technologies. The limitations are largely related to the signal integrity problems, caused by shrinking feature sizes with each new process. Crosstalk, for example, is one of the major issues because it results in unpredictable circuit behavior. This may cause significant timing variations, if not functional failures. Similarly, device and interconnect parasitics become harder to calculate, especially with irregular layout geometries. Accurate and early prediction of such problems, on the other hand, is virtually not possible with the existing tools. Meanwhile, the custom circuits become less affordable because of the skyrocketing design and manufacturing costs. At this point, the gate-array-like structures are becoming an increasingly popular alternative for rapid, low-cost realization of Integrated Circuits (ICs), filling the gap between Field-Programmable Gate-Arrays (FPGAs) and full-custom ASICs. In this work, the main goal is to provide an interconnect-centric design methodology, for which the underlying thinking is prevention over treatment of all these issues. Therefore, a "recipe" is described on how to early characterize these problems and address them even before they appear later during the implementation process. A simple generic RLCK interconnect model is developed and used to systematically characterize the interconnects of various geometries for delay, power and crosstalk noise. The superior performance of the differential interconnects in comparison to mainstream single-ended lines has lead to addressing the insufficient support of the Electronic Design Automation (EDA) tools for differential signaling. A complete RTL-to-GDSII differential design flow is developed that utilizes the advanced design tools through netlist conversion scripts. The advantages of differential signaling are merged with gate-level regularity in a mask-programmable cell fabric suitable for structured ASIC applications, where the basic building block is a via-programmable universal logic gate in MOS current-mode logic (MCML). The MCML design style offers good speed performance and addresses the noise immunity and crosstalk problems thanks to its differential operation. The unit cell can realize all functions up to 3-input and some of the 4-input and 5-input functions. The implementation of benchmark circuits with the proposed fabric have shown that the associated cost is acceptable when compared to the alternatives (standard-cell ASIC and FPGA). Finally, a novel design methodology is proposed which is based on correct-by-construction approach and is claimed to be a better candidate for future designs in nanometer technologies. The methodology is flexible in the sense that it makes it easier to model and to integrate emerging problems through its simulation based design exploration approach, which, in the scope of this thesis, has been focused on interconnect-related issues only. With case studies it is shown that the number of design flow iterations can be dramatically reduced or even removed by better guiding the physical implementation tools. The results dictate the EDA tools a number of advanced features to offer and/or the designers to more strongly utilize some of the existing tool capabilities, in order to manage the ever increasing design complexity.

Serpentine or, its cousin, the folded waveguide (FW) traveling-wave tubes (TWTs) are a class of vacuum electronic devices capable of wideband, high-power performance. This was first demonstrated in [1] with several Q-band 2-stage TWTs that produced 135 W of average power and saturated gains of ~30 dB over an impressive 25% instantaneous bandwidth. More recently, a 60 W broadband 220-GHz (G-band) serpentine TWT was designed and demonstrated at NRL [2]. The excellent agreement between prediction and data G-band TWT serves as an experimental validation for our design tools (MAGIC and Neptune particle-in-cell codes, large signal code Tesla, gun/collector code MICHELLE, 3-D electromagnetic code Analyst, etc.) and methodology; a critical step in the design of future amplifiers. This presentation will discuss electromagnetic properties and beam-wave interaction of the serpentine/FW circuit topology, in general, and design methodology to optimize power, gain, and bandwidth for a “zero-drive” stable amplifier, in particular. A novel hybrid-serpentine circuit topology, which combines key advantages of serpentine and FW topologies, will also be presented and discussed.

Coupling Of Synthesis And Layout: Challenges And Solutions

Are we reaching the limits of what human-centered and user-centered design can cope with? Developing new design methodologies and tools to unlock the potentials of data technologies such as the Internet of Things, Machine Learning and Artificial Intelligence for the everyday job of design is necessary but not sufficient. There is now a need to fundamentally question what happens when human-centered design is unable to effectively give form to technology, why this might be the case, and where we could look for alternatives.

ELECTROMAGNETIC compatibility (EMC) is the engineering of electronic components and systems to ensure the overall functioning in a complex electromagnetic environment. Historically, this has included many aspects of the design, such as compliance with electromagnetic interference (EMI) regulatory standards, and insuring immunity of electronics to the electrical noise, i.e., interference generated by a neighboring system or external source. Electrostatic discharge (ESD) is one aspect of electronic immunity that can lead to failure at the IC, module, or system level that is again becoming a major concern in electronic design. EMC has traditionally also included wave-shaping and ensuring signal fidelity, as well as design of an adequately low-noise power distribution network to minimize EMI, and not compromise signal fidelity. Historically, EMC has been characterized as a “copper-tape-and-ferrites,” trial-and-error discipline that reflects a postdesign approach to EMC. As design cycles have decreased, this approach to EMC has changed dramatically over the course of the past five to seven years. Within the commercial electronics community, the need and demand for EMC computer-aided design tools grew as rapidly as the design cycles decreased, and the complexity and data rates of designs increased. However, suitable tools had not been developed and, inmany cases, the underlying noise coupling and immunity physics were not well understood. In large part, this state of affairs resulted from a lack of funding for more basic research and CAD tool development, and the complexity of the problem. The immediate demand for sophisticated EMC design tools that were undeveloped gave rise to focused research in EMC to understand the coupling physics and develop design methodologies and tools in industry and academia alike. Many individual companies have made significant investments in in-house EMC research, as well as funding of university research. The demand for a basic understanding of interference coupling physics, as well as design approaches and tools led to the development of focused EMC research within the UMR EMCConsortium at the University of Missouri-Rolla, as well as a significant research emphasis in other electronics and packaging centers such as the Packaging Research Center at Georgia Tech and the CALCE Electronic Products and Research Center at the University of Maryland. The field of EMC has grown into a number of specialty areas, in particular, in the past five years, which reflects the present challenges associated with electronic design. This has resulted in part from increasing data rates and clock frequencies, decreasing logic levels resulting from increased power requirements, decreasing design densities, mixedsignal analog/digital designs within the same package, and higher frequency switching power supplies, among a host of other issues. There is still a significant need for a basic understanding of EMC in many aspects of high-speed digital and mixed-signal design including EMI (including radio-frequency interference (RFI)), immunity (including ESD), signal integrity (SI), and power integrity, in particular, at the IC, and IC substrate and packaging level. In addition, the need for modeling approaches and CAD tools in all areas of electromagnetic compatibility is acute. In an engineering design environment, the models and tools must be suitable for rapid computation and be within the expertise of a component or system designer to use. In practice, this reduces to circuit and transmission-line modeling, i.e., the typical SPICE-type environment. The performance of first-pass engineering design validation hardware is often plagued by undesirable parasitics that compromise the signal fidelity and/or level, and dominate the coupling in the case of EMI and immunity. The coupling is through the electric field (capacitive coupling), magnetic field (inductive coupling), or through a common current return path, intended or unintended. In short, EMC is “about the things that are not on the circuit schematic,” i.e., parasitic effects. There is a critical need for design methodologies and CAD tools that are based on well-understood parasitic effects and coupling physics, and can anticipate or extract suitable parasitic lumped circuit element models from a layout geometry. Presently, there are no such mature CAD tools. There are well-developed tools for the numerical solution of Maxwell’s equations, RF circuit design tools, and circuit simulation tools. However, tools for anticipating parasitic effects are predominantly still at a beginning stage of development. To use a literature analogy, the complexity of the problem demands a solution with the sophistication of Tolstoy, but the available tools are at a grade-school primer stage of development. Among the most challenging of electronics designs for EMC are those associated with mobile computing. These designs are typically battery powered with no real-time generation, and are low-power. In addition, the designs IEEE TRANSACTIONS ON MOBILE COMPUTING, VOL. 2, NO. 4, OCTOBER-DECEMBER 2003 273

Realisation of Design Methodologies and Tools in Modern Manufacturing Systems

Today's semiconductor manufacturing trends are increasingly influencing hardware design techniques, tools, and methodologies. We analyze these trends and describe their effects on design methodologies. These effects clearly include impacts on yield optimization resolution enhancement.