Abstract

Implementing dedicated machine learning hardware is becoming essential in many circumstances, raising the challenge for integrated circuit designers to reach resource requirements. Dedicated hardware for machine learning models tends to be extensively power and area-consuming. This work revisits two previously published logic simplification approaches. Moreover, it proposes two new methods to optimize circuits representing trained machine learning models as AND-Invert Graphs (AIGs) through an approximate computing strategy. We calculate the signal probability of AIG nodes based on the training set and define nodes as constants when they surpass a certain probability threshold. The constants are propagated along the AIG, removing unnecessary nodes. We take different strategies to define probability thresholds and precisely set unnecessary nodes as constants. Experimental results considering two Deep Neural Networks and a Random Decision Forest model that classifies the MNIST dataset have reached reductions of 40.9% in size and 22.1% in logic depth with a minimal impact on accuracy.

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