Optimization of silicon-germanium TFT's through the control of amorphous precursor characteristics

Abstract

Polycrystalline thin-film transistors (TFT's) are promising for use as high-performance pixel and integrated driver transistors for active matrix liquid crystal displays (AMLCD's). Silicon-germanium is a promising candidate for use as the channel material due to its low thermal budget requirements. The binary nature of the silicon-germanium system complicates the optimization of the channel deposition conditions. To date, little work has been done to perform this optimization, resulting in poor performance for SiGe TFT's. We report on optimization studies done on the low-pressure chemical vapor deposition of SiGe and its effect on TFT performance. We detail the results of a response surface characterization of SiGe deposition, and explain the obtained results in terms of atomistic models of deposition. Optimization strategies to enable the fabrication of high-performance SiGe TFT's are explained, Using these strategies, SiGe TFT's fabricated using solid phase crystallization and a 550/spl deg/C process are demonstrated, with mobility greater than 40 cm/sup 2//V-s. Analysis is also performed on the effect of Ge-catalysis on the maximum optimization range. Results suggest that SiGe may offer enhanced optimization ranges over Si, as a result of this catalysis.