Abstract

Currently, researchers face new challenges in order to compensate or even reduce the noxious phenomenon known as bias-temperature instability (BTI) that is present in modern metal-oxide-semiconductor (MOS) technologies, which negatively impacts the performance of semiconductor devices. BTI remains a mystery in the way that it evolves in time, as well as the responsible mechanisms for its appearance and the further degradation it produces on MOS devices. The BTI phenomenon is usually associated with an increase of MOS transistor’s threshold voltage; however, this work also addresses BTI as a change in MOSFET’s drain current, transconductance, and the channel’s resistivity. In this way, we detail a physics-based model to get a better insight into the prediction of threshold voltage degradation for aging ranges going from days to years, in 180-nm MOS technology. We highlight that a physics-based BTI model improves accuracy in comparison to lookup table models. Finally, simulation results for the inclusion of such a physics-based BTI model into BSIM3v3 are shown in order to get a better understanding of how BTI impacts the performance of MOS devices.

Highlights

  • The challenges of designing integrated circuits (ICs) are focused on accomplishing high reliability and performance, which are partially associated with minimizing aging effects

  • For the case of n-type MOS (nMOS) devices, in which the substrate is acceptor-type doped, the interface trap’s generation is the inverse process, considering that the bias condition for an nMOS is positive at the gate electrode, so the energy bands will bend downwards, and those states placed between Fermi and intrinsic level will become negatively charged, trapping electrons instead of holes [7]

  • Bonds located at the Si/interface layer (IL) interface; the released hydrogen atoms diffuse from the interfacial transition layer (SiOx ) and within IL; once at the substrate and interfacial layer (Si/IL) interface, these hydrogen atoms react with more hydrogen atoms breaking oxygen vacancies (Ov)-H bonds

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Summary

Introduction

The challenges of designing integrated circuits (ICs) are focused on accomplishing high reliability and performance, which are partially associated with minimizing aging effects. These simulators extrapolate the MOSFET degradation curves from experimental data to obtain the respective degradation of each device in a circuit; even though these results are an estimation, they should not be taken lightly since this estimation has high accuracy even within different commercial simulation tools [14,15] In this way, most of the published papers to date associate BTI degradation with a continuous increasing of the device’s threshold voltage according to the bias and temperature conditions of the transistors; for such reason, a challenge is the inclusion of a real BTI model to reflect such a change.

Bias-Temperature Instability
Silicon-Based Technology
NBTI and PBTI in CMOS Technology
BTI Models
BTI Simulation and Discussion of the Results
Physics-Based Model for NBTI
Physics-Based Model for PBTI
Conclusions
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