On the physical informatics aspects of chemical sensing electronics

Nowadays gas detection in the ppm and sub-ppm domain is essential in terms of environmental protection as well as reducing sanitary risks. However, detecting systems to perform these measurements (e.g., gas chromatographs) are expensive and take up too much space, thus their use is not likely to become wide-spread. Small, cheap and easily mountable sensors, such as resistive sensors are more applicable for this purpose. But the main disadvantage of these sensors is the lack of chemical selectivity. Yet, a novel method called fluctuation-enhanced sensing (FES), which considers the sensor noise as the source of chemical information, can be used to improve selectivity. Since carbon nanotube (CNT)-based sensors are regarded as promising devices for FES measurements, we investigated whether stationary fluctuations in output signal (dc-resistance) of a CNT sensor could be used to increase chemical selectivity. In this work we prove that FES is applicable to increase selectivity of CNT sensors: air polluting gases ( N2O , NH 3 and H2S ) and their mixtures can be distinguished. Furthermore, we also show that different concentrations of the same analyte can be differentiated and chemical selectivity can be extended into the sub-ppm region.

To meet the interest in low power, low cost and small volume, uncooled Infrared Focal Plane Array(IRFPA) and Readout Integrated Circuit(ROIC) with ADC are both emphases for the third generation IRFPA. This paper presents a prototype verification of ROIC with a 14-bit column-level ADC for pyroelectric array. The architecture of ADC is not sensitive to comparator's delay. Therefore, low power and low noise design can be achieved. A prototype of ROIC with column-level ADC is implemented with a 0.5µm DPTM process. And the circuit can be expended to 384×288 array operating at 60Hz. The current of each column ADC is about 6µA.

During supercontinuum formation in nonlinear fiber the presence of a noise seed on the input laser pulse can lead to significant excess noise on the generated output supercontinuum electric field. We relate pulse-averaged moments of this electric-field noise to the measured RF spectrum of the frequency comb formed by the supercontinuum. We present quantitative numerical results for the intrinsic phase and amplitude noise on the frequency comb resulting from input shot noise, including the scaling of the noise with different experimental parameters. This intrinsic noise provides a fundamental lower limit to the phase stability of frequency combs that originate from microstructure fiber.

In this paper, we have proposed some guidelines to achieve a low phase noise design using SiGe BiCMOS commercial technology. First, we observed that the excess noise is l/f type with an excess noise corner frequency in the 1 kHz range, close to the state-of-the-art. Secondly, the measurement correlation between the noise generators indicates that more than one 1/f noise source are present in these devices. We have implemented a low frequency noise model based on the intrinsic noise sources that resulted in good accuracy. Finally, the good LF noise capabilities have been confirmed by residual phase noise measurements at 10 GHz and phase noise at 4 GHz. We demonstrated that an appropriate intrinsic LF noise modelling gives quite a good phase noise prediction. This provides the opportunity of performing low phase noise design of RF and microwave oscillators.

Objective. The objective of the article is to generalize and analyze the theoretical and methodological basis of the green and digital transition of the European tourism ecosystem in the context of the implementation of the renewed industrial strategy of the EU. Methods. To achieve the outlined goal, such methods of empirical and theoretical research were used: literature review, theoretical generalization (to identify, collect and analyze modern research on the digitalization and greening of tourism), a descriptive method (to highlight the methodology of tracking ecological, digital and socio-economic aspects of tourism according to using harmonized data and indicators for the European tourism ecosystem), data visualization (for visualization and grouping of material). Results. Multi-annual EU Work Plan of the European Agenda for Tourism 2030 is characterized in five priority areas, namely: "Enabled policy and governance frameworks", "Green transition", "Digital transition", "Sustainability and inclusion", "Skills and transition support". The methodology of monitoring the green and digital transition of the European tourism ecosystem using the online tool "EU Tourism Dashboard" is highlighted. The indicators of the panel, which are grouped according to the priority areas: "Green transition", "Digital transition" as well as the blocks "Socio-economic indicators" and "Main descriptors of tourism" are summarized, the sources of information for the calculation of indicators are highlighted. The main tools for financing the green and digital transition and increasing the sustainability of EU tourism are substantiated, namely: private investments and loans, sources of EU funding for tourism, EU technical support for the transformation of the tourism ecosystem, programs at the national and regional levels within the framework of cohesion policy.

The design constraints and resultant performance boundaries applicable to the developemnt of optical information processing and computing systems derive directly from certain fundamental limitations imposed by physical laws, as well as from specific algorithmic (and associated architectural) choices implemented within a given device or component technology base.1 In general, a given processing or computation function can be partitioned into the cost (in energy or otherwise) of representation, the cost of computation, and the cost of detection and utilization of the desired computational result. For operation at the quantum limits, for example, analog representations are favored for architectures and algorithms that implement a high degree of computational complexity (irreducible number of equivalent binary operations) per unit detected output resolution element, whereas binary representations favor operations with a somewhat lower degree of complexity. The relevant performance tradeoffs among the various possible computational paradigms, however, are often strongly influenced by the current and projected technological status of the requisite photonic components, including both coherent and dynamically reconfigurable volume holographic optical interconnection elements and both one- and two-dimensional array detectors. In this presentation, we examine a broad range of interrelated—and at times conflicting—device requirements from three complementary perspectives: the fundamental physical limitations that affect the performance of any photonic component function; the current status of component development with respect to such fundamental limits; and the technological considerations that impact present and future device design and development. The implications of these considerations on the evolution of practically implementable algorithms and architectures that exhibit significant computational advantages will be addressed.

Several practical ultrasonic applications are limited by available signal to noise ratio (SNR). In many cases, the limiting factor on SNR is determined by intrinsic self noise, arising from the transducer and preamplifier system. This work describes the development and evaluation of a mathematical model to facilitate a design process for maximum SNR. This model includes the major noise sources as a function of transducer type, construction and operating environment. Centred around the linear systems approach, the model is wideband and valid for any thickness mode transducer system. Simulated and experimental results are performed in both air and water for different transducer configurations, including piezopolymer and piezocomposite devices. The separate contributions arising from transducer noise, preamplifier noise and ambient noise are identified, with good agreement between theoretical and experimental data. Some fundamental design guidelines for effective low noise design are also presented.

In this paper, we study the role that machine learning can play in cooperative driving. Given the increasing rate of connectivity in modern vehicles, and road infrastructure, cooperative driving is a promising first step in automated driving. The example scenario we explored in this paper, is coordinated lane merge, with data collection, test and evaluation all conducted in an automotive test track. The assumption is that vehicles are a mix of those equipped with communication units on board, i.e. connected vehicles, and those that are not connected. However, roadside cameras are connected and can capture all vehicles including those without connectivity. We develop a Traffic Orchestrator that suggests trajectories based on these two sources of information, i.e. connected vehicles, and connected roadside cameras. Recommended trajectories are built, which are then communicated back to the connected vehicles. We explore the use of different machine learning techniques in accurately and timely prediction of trajectories.

Organic Interfaces; or, How Human Beings Augment Their Digital Devices

Background: In the world we live in now, technological devices are becoming more and more important. Digital technology can be a source of information and a good way to learn new things, but it also has some draw backs. Devices like tablets, phones, and computers have taken the place of toys that children used to like. When looked at from this point of view, it can be said that many common technological devices today have both good and bad effects on people. Objective: To assess the parent’s perception of digital technology usage of preschool children in selected schools in Dhaka city, Bangladesh. Methodology: The cross-sectional study was carried out to determine the A total of 123 preschool children’s (age:3-6yrs) parents participated in the study, parents’ perception of digital technology usage of preschool children in selected schools (YWCA Higher Secondary Girls School, Assemblies of GOD Church School, Silver dale Preparatory Girls High School and Zamzam Point Int. School & College) in Dhaka city, Bangladesh from January 2024 to November 2024. Data were collected by face to face interview with the parents by semi structured questionnaire. The participants were selected by convenient sampling procedure. Ethical permission was obtained from the Institutional Review Board(IRB) of BSMMU. Results: A total of 123 parents were participated in the study. Among them, 83.7% were women and 16.3% were men.60.2% of the mothers were between the ages of 20 and 30, and 78% of the fathers were between the ages of 20 and 30. 26.8% of mothers had completed H.S.C level, and 31.7% of fathers had a master's degree or more. Among the parents,48.8% Parents thought that children first used digital technology between the ages of 3 and 4 years. According to Parents perception, half of their children used digital technology for two hours a day. 69% children used digital technology for social media. According to Parents perception 59.3% of their children were generally well-behaved and usually did what adults asked, but 13.8% children often fight with other children. Among them, 36.6% of children had headaches,35.5% had body aches, 13.8% had decreased visual activity, 17.9% had lost weight and felt tired, and 40.7% were lack of sleep disruption. As a result, the children also experienced some psychological effects. 64.2% Parents thought that their children overused digital technology, which took away from their study time, 63.4% of children made them less creative, and 49.6% of children were a little bit restless. Conclusion: Digital technology use can influence a child's physical, psychological and social health. Parents influence children positive usage of technology. In order for children to adopt a healthy lifestyle, it is essential to monitor the amount of time, frequency, and content viewed while using technological devices and to ensure that children have or develop adequate opportunities for physical activity, healthy eating habits, proper sleep cycles, and supportive social relationships. Awareness program should be conducted about proper use of digital technology. Further studies involving larger sample size and addressing geographical variations are needed for generalizability.

Scaling complementary metal oxide semiconductor (CMOS) devices has been a method used very successfully over the last four decades to improve the performance and the functionality of very large scale integrated (VLSI) designs. Still, scaling is heading towards several fundamental limits as the feature size is being decreased towards 10 nm and less. One of the challenges associated with scaling is the expected increase of static and dynamic parameter fluctuations and variations, as well as intrinsic and extrinsic noises, with significant effects on reliability. Therefore, there is a clear, growing need for electronic design automation (EDA) tools that can predict the reliability of future massive nano-scaled designs with very high accuracy. Such tools are essential to help VLSI designers optimize the conflicting tradeoffs between area-power-delay and reliability requirements. In this paper, we introduce an EDA tool that quickly and accurately estimates the reliability of any CMOS gate. The tool improves the accuracy of the reliability calculation at the gate level by taking into consideration the gate's topology, the reliability of the individual devices, the applied input vector, as well as the noise margins. It can also be used to estimate the effect on different types of faults and defects, and to estimate the effects of enhancing the reliability of individual devices on the gate's overall reliability.

Basic limitations of isfet and silicon pressure transducers: noise theory, models and device scaling

This paper presents a design of low power 8 bit 200KS/s Synchronous Successive Approximation Register analog to digital (SAR ADC) converter. The proposed architecture is composed of Input Buffer, Dynamic Latch Comparator, Capacitive DAC, Reference Voltage Generator, and SAR Logic. Dynamic latch comparator is used to reduce the leakage current. In order to implement low power, the architecture of SAR ADC has been used and medium resolution among the architectures. The proposed structure is designed using 55-nm Complementary Metal-Oxided-Semiconductor (CMOS) process technology with 1V of supply voltage and 781.2 Hz of input frequency. The results of the architecture are achieved an effective number of bits (ENOB) of 7.997 bits and a signal to noise, distortion ration (SNDR) level of 49.899 dB with sampling rate 200KS/s. Furthermore, total power consumption of the structure is 245 uW.

An energy efficient modified architecture of 8-bit 100 kS/s SAR ADC for the biomedical implant pacemaker is presented in this paper. With the stringent need to prolong the battery life of portable battery operated biomedical implants such as pacemaker, an improved architecture of SAR ADC is proposed which ensures improved performance than other reported SAR ADC architectures. The ADC employed in the pacemaker drains huge amount of power from battery during the time of analog to digital signal conversion. The work presents ADC design which ensures the microwatt operation which in turn makes the pacemaker to run on small battery. The ADC is realized in 180 nm CMOS technology operated at 1.8 V. The power consumption and energy efficiency reported during simulation are 2.5 µW and 0.77 pJ/state having precision of 6.68 bits.

Integrated mixed signal electronics combining analog, digital and radio frequency circuits is being used to realize beyond-leading-edge components and systems on a chip with revolutionary performance and high levels of functionality. This talk will provide an overview of integrated microsystem development and associated material and device technology. Specific examples will include reconfigurable radio frequency circuit and device technology, heterogeneous integrated circuits, multiresolution spectral sensors, intelligent microsystems and integrated microsystems for digital beamformers. This technology is pushing the limits of conventional scaling, integration, linearity and power dissipation and is changing the paradigm of a variety of systems by making it possible to improve data throughput and connectivity by enabling autonomous reconfigurability, spectral and temporal agility and adaptive behaviour.