On the P+ guard ring sizing strategy to shield against substrate noise

Abstract

Substrate noise coupling remains a major problem for a system on a chip (SoC) design. Coupling between various parts of the system through the substrate may cause malfunctioning of the system. Guard rings are frequently used to shield the analog circuitry from the noisy digital circuits. In this paper measurements show that the isolation does not increase linearly with the guard ring width. These experimental results reveal that starting from a guard ring width above 16 mum, the isolation saturates with the guard ring width. It also shows that the effectiveness of the guard ring strongly depends on its ground connection. The effectiveness of the proposed guard rings against substrate noise is demonstrated on a 5-7 GHz LC voltage controlled oscillator (VCO), designed in a CMOS 130 nm technology.