Abstract
An exponential relation between the gate current of the silicon junction FET and the drain applied voltage is obtained experimentally. It is found that the noise enhancement and input impedance decrease of this device starts at a point corresponding to the appearance of the gate floating potential which is related to the gate current.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
