Abstract
This work presents a comparison between three distinct criteria for evaluating distortion of analog multipliers: the two-dimensional integral nonlinear function and the double input total harmonic distortion, both proposed by us, and the conventional single input total harmonic distortion. A methodology is proposed to experimentally determine these figures of merit using DC characterization. Intending to fit a two-variable polynomial to the multiplier DC transfer surface, distortion coefficients are obtained which can be used to assess the total harmonic distortions. Four different topologies of analog multipliers in CMOS technology have been characterized, by simulation or measurement, and the results demonstrate that DC analysis provides meaningful and reliable distortion figures of merit. An experimental analysis over three additional analog multipliers of commercial integrated circuits using DC characterization is also accomplished.
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