Abstract
ABSTRACTAn offset-gate structure was used to fabricate p-channel MOS transistors in laser-recrystallized silicon-on-insulator (SOI) films. The breakdown voltage increased from about -18 V with a conventional gate structure to about -38 V with the offset gate and was then limited by bulk breakdown in the film, rather than by the high fields near the gate drain overlap region. Simulations indicate that breakdown voltages of about -60 V can be achieved in the structure used, provided that the back-surface fixed-charge density is limited to 1×10″ cm−2.
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