Novel selective poly - and epitaxial - Silicon growth (SPEG) technique for ULSI processing

Abstract

We have succeeded in the development of a novel and simple SPEG technique by using Si 2 H 6 as a silicon source gas under a low-pressure (∼8000 Pa) and a low-temperature (∼ 830°C) with no special treatments such as UV-light irradiation or plasma enhancement. SPEG of a 0.2µm-thin film is accomplished with smooth polysilicon surface and good coverage even in the substrate with sharp step of SiO 2 . The defect density of the epitaxial layer is ∼1 cm-2. Using this new technique, we fabricated successfully the novel bipolar and MOS transistors with contacts over SiO 2 . Even in the low-temperature growth (830°C), 98% bipolar transistors had high BV CEO values above 18 V. These results indicate that the epitaxial layer of SPEG have good quality and the polysilicon layer of SPEG is useful for electrode. Our novel SPEG technique produces high-performance ULSIs without any special processes.