Abstract
The paper describes the various stages involved in the prototype hardware development and implementation of a new protection technique for EHV transmission lines; the fundamental principles, CAD design and performance evaluation using simulated results were described in Parts 1 and 2. The paper includes a description of the experimental setup at the National Grid Company, High Voltage Laboratories, Leatherhead and illustrates the performance of the prototype hardware when subjected to fault-generated high frequency signals obtained under arcing faults on the experimental rig.
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