Abstract
Given a die with I/O pads wire bonded onto the multilayer substrates of a pin grid array (PGA) package, a three-step net-even-wiring system (NEWS) is proposed to complete the routing of the bond pads to the corresponding grid pins on one or more layers. First, we performed a maximum-cut partitioning on a net interference graph for the layer assignment step. Second, nets on each layer were converted to planar sketches using a novel insertion sort method. Last, the planar sketches were transformed into a net-even-wired layout using a simplified rubber-band router.
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