Abstract
In this paper, an abnormal diameter-dependent annealing (DDA) effect in silicon nanowire transistors (SNWTs) is observed and its impacts on device performance are investigated. It is found that the implanted dopants diffuse faster in thin nanowires than those in thick nanowires during the rapid annealing process, which results in underestimating the length of designed source/drain (S/D) extension (SDE) region in SNWTs. The impacts of DDA on SNWTs are studied in terms of S/D series resistance (RSD), tradeoff between parasitic capacitance and resistance, and process parameter dependence. The random dopant fluctuations (RDF) in nanowire SDE regions (SDE-RDF) are also discussed. The results indicate that SDE-RDF induced RSD variation in SNWTs is enhanced by DDA effects, which aggravates the driving current variations with the downscaling of SNWT diameter.
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