Abstract
Two different TDDB behaviors have been for the first time observed in our work with different dual gate oxide thicknesses. (1st) The different transient scheme during TDDB stress for thin and thick oxide thickness, and (2nd) The different neutral trap generation rate during oxide degradation procedure for n and p type capacitors and different neutral trap distribution post oxide stress for thin and thick oxides. A variety of physical and electrical methodologies are presented in this paper to investigate the role of boron on 0.17 /spl mu/m dual gate and dual oxide technologies.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
