New Boundary Condition for Decoupling Capacitance Selection in SiC Phase Legs Considering Short-Circuit Events

Abstract

This paper presents a new boundary condition for designing phase legs when using the decoupling capacitance method. New SiC MOSFETs have much higher short-circuit currents—over 14X datasheet rating—then comparable Si IGBT devices. The energy draw on the decoupling capacitance due to this can be a large step input that over-voltages the device if not accounted for. Decoupling capacitance requirements have previously been based on switching conditions during normal operation and may not be sufficient for high current devices or modules. Furthermore, fast protection work has focused on lower current discrete devices whereas this issue becomes more prevalent in higher current configurations. Analysis of device over-voltage during short-circuit events is presented along with new sizing guidelines for DC link decoupling capacitance.